Creating a new language for logic circuits

sachindas246

SachinDas246

Posted on November 11, 2021

Creating a new language for logic circuits

Building electronic circuits can be difficult especially the bigger ones,as there is no printf to check if wire is properly connected. Being an electrical engineering ,I have tried to build tools that would help understand and design electronics faster and better. Chip.io
is one such android app that would give a virtual experience of using a 8085 trainer kit.

But in this project I want something more complex😈,
something like a code that would define a logic circuit. I know what you are going say now, there is verilog for that ? Ya ,there is .. but in my opinion it could be made more simpler and easy to use. More over my main focus is not to create a language to program a FPGA, instead to a language to define a logic circuit for simulation, so I believe there could some compromises which I could utilise to make it more understandable.

However, I don't discourage the possibility of using it to program integrated circuits🤔.

How is it implemented?

It's basically a nodejs project which utilizes nearley and Moo to parse the code which is then converted to a particular javascript format that simulates logic circuit.

Where it started?

All of this began while I was trying to design a circuit in logisim and was not able to do in the way I wanted it to be. Also at that time i had already started messing out with lexer and parsers, which finally led to this project.

Milestones 🗿 and targets

  • Build an interpreter that can run the code
  • Multiple libraries that implements complex circuits.
  • A graphic interface which can generate the code by drag n drop ( Similar to logisim )
  • Ability to program integrated circuits ( sometimes 😜)

Sample program

Let me show you a sample of the program

module HalfAdder([a,b]=>[s,c])
{
    init{
        [s] = [0];
        [c] = [0];
    }
    process {
        [s] = XOR([a,b]);
        [c] = AND([a,b]);
    }
}
HalfAdder Adder;

Input [A] = [0];
Input [B] = [0];
Output [S];
Output [C];

wire(A => Adder.a);
wire(B => Adder.b);
wire(Adder.s => S);
wire(Adder.c => C);

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And this would produce a circuit like
logic circuit

Explanation

I don't want to go deep into the explanation but in simple terms we created a blue print for HalfAdder ,whose inputs are a and b, outputs are s and c. After which we instantiated a HalfAdder ( as Adder) which is connected to input ports A and B , Output Ports S and C

Any suggestions and feedbacks is greatly appreciated.
Thank you ❤️ for reading.

💖 💪 🙅 🚩
sachindas246
SachinDas246

Posted on November 11, 2021

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November 11, 2021